<?xml version="1.0" encoding="UTF-8"?><ns2:project xmlns:ns1="http://gtr.rcuk.ac.uk/gtr/api" xmlns:ns2="http://gtr.rcuk.ac.uk/gtr/api/project" xmlns:ns3="http://gtr.rcuk.ac.uk/gtr/api/fund" xmlns:ns4="http://gtr.rcuk.ac.uk/gtr/api/person" xmlns:ns5="http://gtr.rcuk.ac.uk/gtr/api/project/outcome" xmlns:ns6="http://gtr.rcuk.ac.uk/gtr/api/organisation" ns1:created="2026-07-08T08:44:08Z" ns1:href="http://gtr.ukri.org/gtr/api/projects/93A95B99-FA43-402A-85D8-CDC606E1E4B4" ns1:id="93A95B99-FA43-402A-85D8-CDC606E1E4B4"><ns1:links><ns1:link ns1:href="http://gtr.ukri.org/gtr/api/persons/598E9E32-50E1-469D-92FB-D5CF383C23B1" ns1:rel="PM_PER"/><ns1:link ns1:href="http://gtr.ukri.org/gtr/api/organisations/2F244C92-558E-49CA-A0FC-565B2B46474A" ns1:rel="LEAD_ORG"/><ns1:link ns1:href="http://gtr.ukri.org/gtr/api/organisations/2F244C92-558E-49CA-A0FC-565B2B46474A" ns1:rel="PARTICIPANT_ORG"/><ns1:link ns1:href="http://gtr.ukri.org/gtr/api/organisations/E04097D1-7386-4BEC-AB80-85F0EEB80CB2" ns1:rel="PARTICIPANT_ORG"/><ns1:link ns1:end="2025-02-28T00:00:00Z" ns1:href="http://gtr.ukri.org/gtr/api/funds/F39C2BC7-6A0E-47AF-912F-A8877CA8751E" ns1:rel="FUND" ns1:start="2024-11-01T00:00:00Z"/></ns1:links><ns2:identifiers><ns2:identifier ns2:type="RCUK">10131746</ns2:identifier></ns2:identifiers><ns2:title>Development of high-throughput, multi-scale porosity-dependent inspection of porous wafer and microLED chips</ns2:title><ns2:status>Closed</ns2:status><ns2:grantCategory>Collaborative R&amp;D</ns2:grantCategory><ns2:leadFunder>Innovate UK</ns2:leadFunder><ns2:abstractText>MicroLED display technology offers a huge performance improvement with optimal brightness, efficiency, image definition, and extended lifespan. However, achieving high-efficiency, ultra-fine-pitch pixels for multiple-colour displays has been a longstanding challenge.

Porotech is an emerging Gallium Nitride (GaN) material technology developer and a spin-out from the University of Cambridge. Porotech offers a solution based on the proprietary porous GaN technology, PoroGaN(r). This technology introduces nanopores (10-50 nm) into epitaxial film (50nm-5um) at wafer-scale (6, 8, 12 inches). It provides a broad range of pore sizes, porosity, and structures, offering a dramatically new combination of optical, mechanical, thermal, and electrical properties. Consequently, it opens up new horizons for device engineering. The PoroGaN(r) products are currently used for delivering Porotech's disruptive DynamicPixelTuning (DPT(r)) microdisplay product.

Porotech is embarking on an innovative project to develop high-throughput, multi-scale porosity-dependent inspection techniques for porous wafers and microLED chips. Leveraging our proprietary PoroGaN(r) material platform, this project addresses the critical need for comprehensive, high-resolution inspection of PoroGaN(r) wafers and microLED chips, essential for our mass production. The technological challenge lies in controlling the quality of these wafers through advanced inspection methods that provide accurate measurements of optical, electrical, and thermal behaviours across various scales. By integrating advanced photoluminescence (PL) mapping, ellipsometry spectroscopy (ES), and electroluminescence (EL) mapping, in combination with reflectance and micro-EL spectroscopy, and sophisticate data analysis approach, we aim to achieve comprehensive analysis of the surface defects, structural, and optical properties of the porous wafers and microLED chips, making it a pioneering effort in enhancing microLED manufacturing processes. Currently we lack of access of facilities to measure optical/electrical/thermal properties of microLED at multiple-scales. This project will leverage the expertise and facilities of the National Physical Laboratory (NPL) to address critical measurement challenges, ultimately enhancing Porotech's manufacturing capabilities and positioning the UK as a leader in the compound semiconductor industry. The high-throughput inspection methods developed during this project will significantly reduce our in-house development costs, saving approximately &amp;pound;600k. This will translate into an increased margin of over &amp;pound;1M in the following years due to higher product quality and yield, as well as cost savings from more efficient manufacturing processes. Additionally, the standardisation of wafer-scale inspection tools for porous wafers will be the major CAPEX in the next three years. If we extend the methodology from conventional to porous wafers and upgrade from the existing equipment, the cost saving on CAPEX can be over &amp;pound;4M.</ns2:abstractText></ns2:project>