C 3 D: Mitigating the NUMA bottleneck via coherent DRAM caches (2016)

First Author: Huang C
Attributed to:  C3: Scalable & Verified Shared Memory via Consistency-directed Cache Coherence funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/micro.2016.7783739

Publication URI: http://dx.doi.org/10.1109/micro.2016.7783739

Type: Conference/Paper/Proceeding/Abstract