Hardware Assisted Rate Distortion Optimization with Embedded CABAC Accelerator for the H.264 Advanced Video Codec (2006)
Attributed to:
Dynamically Reconfigurable Hardware Architectures for Context-Based Statistical Compression of Visual and Data Content
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tce.2006.1649684
Publication URI: http://dx.doi.org/10.1109/tce.2006.1649684
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Consumer Electronics
Issue: 2