📣 Try out the NEW Gateway to Research and let us know what you think.

We're looking for users to test the new service during August and September and share their feedback. Express your interest by completing this short form.

Transparent In-Circuit Assertions for FPGAs (2017)

First Author: Hung E

Attributed to: Event-based parallel computing - partially ordered event-triggered systems (POETS) funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tcad.2016.2618862

Publication URI: http://dx.doi.org/10.1109/tcad.2016.2618862

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue: 7