📣 Try out the NEW Gateway to Research and let us know what you think.

We're looking for users to test the new service during August and September and share their feedback. Express your interest by completing this short form.

How to Shrink My FPGAs - Optimizing Tile Interfaces and the Configuration Logic in FABulous FPGA Fabrics (2022)

First Author: Chung K

Attributed to: Functional Oxide Reconfigurable Technologies (FORTE): A Programme Grant funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/3490422.3502371

Publication URI: http://dx.doi.org/10.1145/3490422.3502371

Type: Conference/Paper/Proceeding/Abstract