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Verifying parallel dataflow transformations with model checking and its application to FPGAs (2019)

First Author: Stewart R

Attributed to: The Integration and Interaction of Multiple Mathematical Reasoning Processes funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1016/j.sysarc.2019.101657

Publication URI: http://dx.doi.org/10.1016/j.sysarc.2019.101657

Type: Journal Article/Review

Parent Publication: Journal of Systems Architecture

ISSN: 1383-7621