📣 Try out the NEW Gateway to Research and let us know what you think.

We're looking for users to test the new service during August and September and share their feedback. Express your interest by completing this short form.

A Scalable Packet Sorting Circuit for High-Speed WFQ Packet Scheduling (2008)

First Author: McLaughlin K

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tvlsi.2008.2000323

Publication URI: http://dx.doi.org/10.1109/tvlsi.2008.2000323

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Issue: 7