A High Throughput FPGA-Based Floating Point Conjugate Gradient Implementation for Dense Matrices (2010)
Attributed to:
Research Cluster on the use of novel hardware for real-time computing for the Digital Economy
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1145/1661438.1661439
Publication URI: http://dx.doi.org/10.1145/1661438.1661439
Type: Journal Article/Review
Parent Publication: ACM Transactions on Reconfigurable Technology and Systems
Issue: 1