Ultimate Control of Strain Relaxation Processes in SiGe Layers

Silicon is the bedrock of the digital revolution. It occupies this position because of its unique chemical and physical properties. The low speed with which electrons and other current carriers move across silicon has traditionally been seen as a problem which can be solved by reductions in device size. As scaling of silicon devices into the nanometre regime becomes increasingly difficult and prohibitively expensive on a commercial scale, new channel materials could play a critical role that maintains the dominant position of silicon electronics well into the future. For example, the mobility of electrons, etc, may be increased, with consequent improvements in device speed and/or power consumption, by growing a thin layer of silicon on a SiGe platform which produces tensile strain in the silicon. Unfortunately current versions of these SiGe virtual substrates have high densities of defects and poor surface topography, making them unsuitable for commercial production. The proposed work concerns the development of novel and radical approaches to the development of SiGe virtual substrates of unprecedented quality in this respect.