III-V MOSFETs for Ultimate CMOS
Lead Research Organisation:
University of Glasgow
Department Name: Electronics and Electrical Engineering
Abstract
The semiconductor industry is one of the largest on the planet, with a turnover of more than $200 billion each year. Integrated circuits produced by the semiconductor industry are found inside all modern electronic appliances and products including mobile phones, cars, medical diagnostic equipment, controlling the safe operation of factories and public transportation systems and powering the Internet . In short, they are vital to modern life in the 21st Century. Since the invention of the transistor in 1957, manufacturers such as AMD, Intel, IBM and Freescale have been successful in developing ever more complex integrated circuits by making the individual transistors smaller and finding ways to combine more of them together on a single chip. The result has been a regular increase in the computational and processing capability of integrated circuits by doubling the number of transistors in each circuit every 2-3 years. Currently the most advanced integrated circuits contain hundreds of millions of transistors, each of which is 1/10,000 of the diameter of a human hair in size. Until now, this increase in capability has resulted from making smaller silicon-based transistors, however fundamental limits imposed by the properties of silicon are now being reached so that alternative materials need to be considered. In the view of all the major manufacturers mentioned above, a strong candidate to enable continued performance improvements for the industry are compound semiconductors. The Nanoelectronics Research Centre at the University of Glasgow is one of the world leaders in compound semiconductor transistor technology. For the last 3 years we have been working closely with Freescale Semiconductors to develop such transistor technologies which will, by around 2016, be ready for large scale manufacture as required for continued integrated circuit performance improvement at that time. This 3.8M, 3 year project, is focussed on delivering prototype compound semiconductor transistor technology, capable of being scaled up to large volume manufacture, with the required performance to deliver the types of processing and control functions required by integrated circuits in 2016. In addition to applications using digital logic such as microprocessors, this technology is expected to be of more general use, in areas such as sensors and photonics for medial, safety, imaging and communications applications. Five teams from the University of Glasgow will participate in the research which will cover compound semiconductor growth techniques controlled to atomic level precision; electrical, chemical and structural characterisation of the semiconductor materials the transistors fabricated from them, again on atomic lengthscales; powerful computer simulation to optimise transistor design; developing compound semiconductor processing techniques compatible with existing, well understood silicon-based methods; and building prototype transistors to show that the performance requirements are being met. Together, this project will deliver key information and understanding which will enable the semiconductor industry to continue to be one of the most successful on the planet in the coming decades.
Publications
Ahn J
(2011)
Titania/alumina bilayer gate insulators for InGaAs metal-oxide-semiconductor devices
in Applied Physics Letters
Ayubi-Moak J
(2009)
Effect of interface state trap density on the characteristics of n-type, enhancement-mode, implant-free In0.3Ga0.7As MOSFETs
in Microelectronic Engineering
Benbakhti B
(2010)
Impact of interface state trap density on the performance characteristics of different III-V MOSFET architectures
in Microelectronics Reliability
Bentley S
(2011)
Electron Mobility in Surface- and Buried-Channel Flatband $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ MOSFETs With ALD $\hbox{Al}_{2}\hbox{O}_{3}$ Gate Dielectric
in IEEE Electron Device Letters
Hill R
(2008)
1 [micro sign]m gate length, In0.75Ga0.25As channel, thin body n-MOSFET on InP substrate with transconductance of 737 [micro sign]S/µm
in Electronics Letters
Hill R
(2009)
Deep sub-micron and self-aligned flatband III–V MOSFETs
Holland M
(2009)
Characteristics of GdGaO grown by MBE
in Microelectronic Engineering
Ignatova O
(2010)
Lithography scaling issues associated with III-V MOSFETs
in Microelectronic Engineering
Kalna K
(2008)
Benchmarking of Scaled InGaAs Implant-Free NanoMOSFETs
in IEEE Transactions on Electron Devices
Li X
(2010)
Dry etching device quality high-? GaxGdyOz gate oxide in SiCl4 chemistry for low resistance ohmic contact realisation in fabricating III-V MOSFETs
in Microelectronic Engineering
Li X
(2010)
Low damage fully self-aligned replacement gate process for fabricating deep sub-100 nm gate length GaAs metal-oxide-semiconductor field-effect transistors
in Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena
Li X
(2009)
Fully self-aligned process for fabricating 100nm gate length enhancement mode GaAs metal-oxide-semiconductor field-effect transistors
in Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena
Longo P
(2010)
A TEM nanoanalytical investigation of Pd/Ge ohmic contacts for the miniaturization and optimization of n-InGaAs MOSFET devices
in Journal of Physics: Conference Series
Longo P
(2009)
A nanoanalytical investigation of the Ga2O3/GaGdO dielectric gate stack for InGaAs based MOSFET devices
in Microelectronic Engineering
Longo P
(2010)
An EELS sub-nanometer investigation of the dielectric gate stack for the realization of InGaAs based MOSFET devices
in Journal of Physics: Conference Series
Longo P
(2009)
A nanoanalytical investigation of high-k dielectric gate stacks for GaAs based MOSFET devices
in Microelectronic Engineering
Longo P
(2009)
A TEM Nanoanalytic Investigation of Pd/Ge Ohmic Contacts for the Miniaturization and Optimization of InGaAs nMOSFET Devices.
in Microscopy and Microanalysis
Longo P
(2009)
A EELS Sub Nanometer Investigation of the Dielectric Gate Stack for the Realization of InGaAs Based MOSFET Devices
in Microscopy and Microanalysis
Macintyre D
(2009)
Resist residues and transistor gate fabrication
in Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena
Melitz W
(2012)
Atomic imaging of atomic layer deposition oxide nucleation with trimethylaluminum on As-rich InGaAs(001) 2 × 4 vs Ga/In-rich InGaAs(001) 4 × 2.
in The Journal of chemical physics
Melitz W
(2012)
Scanning Probe Microscopy Imaging before and after Atomic Layer Oxide Deposition on a Compound Semiconductor Surface
in Solid State Phenomena
Melitz W
(2010)
(Invited) Tip Cleaning and Sample Design for High Resolution MOSCAP x-KPFM
in ECS Transactions
Oxland R
(2012)
An Ultralow-Resistance Ultrashallow Metallic Source/Drain Contact Scheme for III-V NMOS
in IEEE Electron Device Letters
Paterson G
(2011)
Broadening of metal-oxide-semiconductor admittance characteristics: Measurement, sources, and its effects on interface state density analyses
in Journal of Applied Physics
Paterson G
(2011)
Gadolinium gallium oxide/gallium oxide insulators on GaAs and In0.53Ga0.47As n+ MOS capacitors: The interface state model and beyond
in Journal of Applied Physics
Paterson G
(2008)
Gallium oxide and gadolinium gallium oxide insulators on Si d-doped GaAs/AlGaAs heterostructures
in Journal of Applied Physics
Paterson G
(2012)
Admittance and subthreshold characteristics of atomic-layer-deposition Al2O3 on In0.53Ga0.47As in surface and buried channel flatband metal-oxide-semiconductor field effect transistors
in Journal of Applied Physics
Paterson G
(2012)
Modeling and analysis of the admittance characteristics of n+ metal-oxide-semiconductor capacitors with oxide and interface states - Gd0.25Ga0.15O0.6/Ga2O3 on In0.53Ga0.47As
in Journal of Applied Physics
Peralagu U
(2014)
Electrical and physical characterization of the Al2O3/ p -GaSb interface for 1%, 5%, 10%, and 22% (NH4)2S surface treatments
in Applied Physics Letters
Robb PD
(2012)
Characterisation of InAs/GaAs short period superlattices using column ratio mapping in aberration-corrected scanning transmission electron microscopy.
in Micron (Oxford, England : 1993)
Robb PD
(2012)
Experimental evaluation of interfaces using atomic-resolution high angle annular dark field (HAADF) imaging.
in Ultramicroscopy
Robb PD
(2012)
Modelling of AlAs/GaAs interfacial structures using high-angle annular dark field (HAADF) image simulations.
in Ultramicroscopy
Taking S
(2010)
Surface passivation of AlN/GaN MOS-HEMTs using ultra-thin Al 2 O 3 formed by thermal oxidation of evaporated aluminium
in Electronics Letters
Thayne I
(2009)
Review of Current Status of III-V MOSFETs
in ECS Transactions
Thayne I
(2011)
III-V nMOSFETs - Some issues associated with roadmap worthiness (invited)
in Microelectronic Engineering
Thayne I
(2009)
Development of III-V MOSFET Process Modules Compatible with Silicon ULSI Manufacture
in ECS Transactions
Thayne I.
(2012)
III-V MOSFETs for sub-15 nm technology generation CMOS : Some observations, issues and solutions
in 2012 International Conference on Compound Semiconductor Manufacturing Technology, CS MANTECH 2012
| Description | This was pioneering work on the use of compound semiconductor transistors as a potential technology booster to enable continued scaling of the mainstream semiconductor industry beyond 2020. At the tme the work commenced, there was little research in the area. A number of seminal papers were produced which motivated singificant additional research in the area worldwide, and has contributed to this technology solution being seriously adopted by the mainstream semiconductor industry |
| Exploitation Route | The research in the area has subsequently been supported by a number of mainstream semiconductor manufacturers including TSMC, Intel, IBM, Freescale, Global Foundries and Tokyo Electron |
| Sectors | Digital/Communication/Information Technologies (including Software) Electronics |
| Description | European Union Framework 7 |
| Amount | £385,528 (GBP) |
| Funding ID | FP7-ICT-2007-1 |
| Organisation | European Commission |
| Department | Seventh Framework Programme (FP7) |
| Sector | Public |
| Country | European Union (EU) |
| Start | 11/2013 |
| End | 09/2016 |
| Description | Semiconductor Research Corporation |
| Amount | $450,000 (USD) |
| Funding ID | SRC_1637_001 |
| Organisation | Semiconductor Research Corporation |
| Sector | Private |
| Country | United States |
| Start | 01/2005 |
| End | 12/2014 |