Codesign: A higher-order approach

Lead Research Organisation: Imperial College London

Department Name: Electrical and Electronic Engineering

Abstract

Abstracts are not currently available in GtR for all funded research. This is normally because the abstract was not required at the time of proposal submission, but may be because it included sensitive information such as personal details.

Funded Value:

£297,109

Funded Period:

Jun 13 - Dec 16

Funder:

EPSRC

Project Status:

Closed

Project Category:

Research Grant

Project Reference:

EP/K015168/1

Principal Investigator:

George Constantinides

Research Subject:

Info. & commun. Technol. (100%)

Research Topic:

Fundamentals of Computing (50%)

System on Chip (50%)

Organisations

People	ORCID iD
George Constantinides (Principal Investigator)	http://orcid.org/0000-0002-0201-310X

Publications

Author Name

Title Publication Date Published

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10 25 50

Wickerson J (2017) Automatically comparing memory consistency models in ACM SIGPLAN Notices

Wickerson J (2015) Remote-scope promotion: clarified, rectified, and verified

Ramanathan N (2018) Concurrency-Aware Thread Scheduling for High-Level Synthesis

Ramanathan N (2018) Scheduling Weakly Consistent C Concurrency for Reconfigurable Hardware in IEEE Transactions on Computers

Ramanathan N (2021) Global Analysis of C Concurrency in High-Level Synthesis in IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Picciau A (2016) Balancing Locality and Concurrency: Solving Sparse Triangular Systems on GPUs

Greene J (2017) Hardware Synthesis of Weakly Consistent C Concurrency

Fleming S (2015) PushPush: Seamless integration of hardware and software objects via function calls over AXI

Fleming S (2015) System-level Linking of Synthesised Hardware and Compiled Software Using a Higher-order Type System

Chen D (2016) Automatically Optimizing the Latency, Area, and Accuracy of C Programs for High-Level Synthesis

Key Findings
Impact Summary
Collaboration


Description	That linking / late binding is a feasible approach in codesign, if underpinned by an appropriate type system.
Exploitation Route	To improve the synthesis of hardware / software systems
Sectors	Digital/Communication/Information Technologies (including Software) Electronics


Description	To explore alternative methods of design capture bridging hardware and software. Some of this work was continued by Microsoft Research and is now being investigated in Xilinx Research Labs.
Sector	Digital/Communication/Information Technologies (including Software),Electronics
Impact Types	Economic


Description	Xilinx Inc (Corporate HQ)
Organisation	Xilinx Corp
Country	United States
Sector	Private
Start Year	2005

Abstract

Organisations

People

ORCID iD

Publications