Low-Dimensional Electronic Device Fabrication at Low Cost over Large Areas
Lead Research Organisation:
University of Cambridge
Department Name: Engineering
Abstract
There is a general rule of thumb that the cost of manufacturing doubles every time the precision is improved by a factor of ten. Crudely, this is why it costs billions of pounds to set up a fabrication plant to manufacture microprocessors, where the physical size of the transistors being manufactured is on the length scale of a few nanometre, compared with the cost of setting up a facility to manufacture printed circuit boards which sufficiently cheap to be widely available, but features are on the scale of hundreds of micrometers.
There are cases of where this rule can be broken. One is in the use of low-dimensional materials which naturally form on a nanometre length scale. An example of this is graphene, which has received a lot of attention in recent years. It naturally forms in a two-dimensional sheet of carbon atoms, and so does not need to be 'machined' to achieve a nanometre-scale thickness. Such 'bottom-up' processes achieve high resolution at very low cost, which is one reason for the interest. However, they still require electrical contacts to be made to the materials to define a complete device. Ideally, we would like to use only a small quantity of these materials, for example by patterning two metal electrodes separated by only a few nanometre with the low-dimensional material (e.g. graphene) inside the nanogap. As the patterning of the metal one this length scale requires a high resolution process, the cost becomes prohibitive again.
This project aims to tackle this manufacturing problem directly by combining an emerging technique called 'adhesion lithography' with the growth of low-dimensional materials to create the structures required to make real electronic devices using these materials. Adhesion lithography uses self-assembled monolayers (SAM) to control how well different materials can stick to each other. This allows one metal to be deposited onto a low-cost substrate, like plastic, and patterned using a low cost, low resolution process and a second to be deposited everywhere over the top. Using the SAM, it is possible to ensure that the second metal does not stick to the first. This allows the second metal to be peeled away from the first, uncovering it in the process and leaving a nanogap all around the edge of the first metal. A nanometre scale structure has
therefore been manufactured, but without the associated cost.
The peeling process has been shown to be critical to make this work. Therefore, this project aims to design and build a low cost tool to carry out this peeling process on a 10x10 cm length scale, but with a clear route to scaling up to large areas (e.g. an A3 sheet). In addition, we will show that the nanogap can be incorporated with the deposition of a low-dimensional material to create a genuine electronic nanoscale device, but with the cost of a much larger device. We expect the this will allow entirely new devices to be developed for a whole range of applications, from logic to memories to sensors.
There are cases of where this rule can be broken. One is in the use of low-dimensional materials which naturally form on a nanometre length scale. An example of this is graphene, which has received a lot of attention in recent years. It naturally forms in a two-dimensional sheet of carbon atoms, and so does not need to be 'machined' to achieve a nanometre-scale thickness. Such 'bottom-up' processes achieve high resolution at very low cost, which is one reason for the interest. However, they still require electrical contacts to be made to the materials to define a complete device. Ideally, we would like to use only a small quantity of these materials, for example by patterning two metal electrodes separated by only a few nanometre with the low-dimensional material (e.g. graphene) inside the nanogap. As the patterning of the metal one this length scale requires a high resolution process, the cost becomes prohibitive again.
This project aims to tackle this manufacturing problem directly by combining an emerging technique called 'adhesion lithography' with the growth of low-dimensional materials to create the structures required to make real electronic devices using these materials. Adhesion lithography uses self-assembled monolayers (SAM) to control how well different materials can stick to each other. This allows one metal to be deposited onto a low-cost substrate, like plastic, and patterned using a low cost, low resolution process and a second to be deposited everywhere over the top. Using the SAM, it is possible to ensure that the second metal does not stick to the first. This allows the second metal to be peeled away from the first, uncovering it in the process and leaving a nanogap all around the edge of the first metal. A nanometre scale structure has
therefore been manufactured, but without the associated cost.
The peeling process has been shown to be critical to make this work. Therefore, this project aims to design and build a low cost tool to carry out this peeling process on a 10x10 cm length scale, but with a clear route to scaling up to large areas (e.g. an A3 sheet). In addition, we will show that the nanogap can be incorporated with the deposition of a low-dimensional material to create a genuine electronic nanoscale device, but with the cost of a much larger device. We expect the this will allow entirely new devices to be developed for a whole range of applications, from logic to memories to sensors.
Planned Impact
This project will have impacts across a diverse range of areas as its aim is to develop a technique for manufacturing electronic devices that take advantage of low-dimensional materials but at low-cost and over large areas.
INDUSTRIAL MANUFACTURING
A key output from this project is the development of a tool that is capable of patterning ~10 nm gaps between dissimilar metal electrodes and its integration into a process for filling this gap with low-dimensional materials, such as graphene and zinc oxide nanowires, to create electronic devices. There has been significant research effort put into the development of 'bottom-up' materials which naturally self-assemble into a low-dimensional nanostructure. Whilst there has been some success in creating electronic devices using these materials by combining them into polymer composites and printing them, the properties of the low-dimensional material are compromised by the polymer matrix. Therefore, the theoretical properties of these materials have not been practically accessible. The output from this project - namely the tools and associated processing information - will provide a clear route for the electronics industry in the UK and beyond to use these materials. The UK electronics industry has a long history of generating valuable intellectual property. By opening up this manufacturing process it is anticipated that this will naturally lead to new IP generation. In the short-term we will support this process by making the tool and associated recipes available to industrial users through the Electrical Engineering Clean Facility in Cambridge. This is an open access facility with a long track record of having SMEs, particularly from the vibrant Cambridge area, using equipment. In the longer term, we would like to partner with other companies and the Centre for Process Innovation (CPI) CATAPULT to see a scaled-up version of the tool in operation at CPI.
TRAINING PEOPLE
This project will allow the postdoctoral research associate working on this project to significantly develop their research skills. The project will be very outward-focussed with a need to communicate the benefits of adhesion lithography to potential end users. This will require development of communication skills. We are already offering final year undergraduate projects on adhesion lithography to students on the M.Eng. course at Cambridge. This will help to expose the opportunities of the process and the use of low-dimensional materials to the next generation of electronic engineers.
SOCIETY
The development of mobile electronic devices, and in particular the smartphone, has transformed our daily lives. This is leading to a digitally connected future, commonly called the 'Internet of Things' in which everything has a digital presence. This requires high performance electronics to be distributed, but this only makes economic sense if the electronics is very low cost. This will require being able to take full advantage of the properties of low-dimensional materials and integrating these with low-cost and large-area substrates, such as plastic. This is exactly the space in which this work sits.
KNOWLEDGE
Finally, there is a in academic benefit to the research. This project will allow the electronic properties of low-dimensional materials to be studied on a nanometre length scale with relative ease. Researchers will be able to more quickly optimise new low-dimensional materials and understand their fundamental electronic properties.
INDUSTRIAL MANUFACTURING
A key output from this project is the development of a tool that is capable of patterning ~10 nm gaps between dissimilar metal electrodes and its integration into a process for filling this gap with low-dimensional materials, such as graphene and zinc oxide nanowires, to create electronic devices. There has been significant research effort put into the development of 'bottom-up' materials which naturally self-assemble into a low-dimensional nanostructure. Whilst there has been some success in creating electronic devices using these materials by combining them into polymer composites and printing them, the properties of the low-dimensional material are compromised by the polymer matrix. Therefore, the theoretical properties of these materials have not been practically accessible. The output from this project - namely the tools and associated processing information - will provide a clear route for the electronics industry in the UK and beyond to use these materials. The UK electronics industry has a long history of generating valuable intellectual property. By opening up this manufacturing process it is anticipated that this will naturally lead to new IP generation. In the short-term we will support this process by making the tool and associated recipes available to industrial users through the Electrical Engineering Clean Facility in Cambridge. This is an open access facility with a long track record of having SMEs, particularly from the vibrant Cambridge area, using equipment. In the longer term, we would like to partner with other companies and the Centre for Process Innovation (CPI) CATAPULT to see a scaled-up version of the tool in operation at CPI.
TRAINING PEOPLE
This project will allow the postdoctoral research associate working on this project to significantly develop their research skills. The project will be very outward-focussed with a need to communicate the benefits of adhesion lithography to potential end users. This will require development of communication skills. We are already offering final year undergraduate projects on adhesion lithography to students on the M.Eng. course at Cambridge. This will help to expose the opportunities of the process and the use of low-dimensional materials to the next generation of electronic engineers.
SOCIETY
The development of mobile electronic devices, and in particular the smartphone, has transformed our daily lives. This is leading to a digitally connected future, commonly called the 'Internet of Things' in which everything has a digital presence. This requires high performance electronics to be distributed, but this only makes economic sense if the electronics is very low cost. This will require being able to take full advantage of the properties of low-dimensional materials and integrating these with low-cost and large-area substrates, such as plastic. This is exactly the space in which this work sits.
KNOWLEDGE
Finally, there is a in academic benefit to the research. This project will allow the electronic properties of low-dimensional materials to be studied on a nanometre length scale with relative ease. Researchers will be able to more quickly optimise new low-dimensional materials and understand their fundamental electronic properties.
Publications
Wyatt-Moon G
(2023)
Nanodiodes on a Digestible Substrate
in IEEE Electron Device Letters
Wyatt-Moon G.
(2022)
Nanoscale Semiconductor Devices Fabricated using Adhesion Lithography at Low Cost
in Proceedings of the International Display Workshops
Wyatt-Moon G
(2023)
Nanodiodes on a Digestible Substrate
Description | The Adhesion Lithography (A-Lith) process involves using a low-cost technique to create a patterned metal layer (e.g. evaporation through a shadow mask or printing) on a substrate (e.g. plastic). The metal can then be selectively coated in a self-assembled monolayer (SAM) whilst the rest of the substrate is not coated. A second metal can then be coated on top of the substrate through a second shadow mask. The SAM lowers the adhesion of this second metal selectively where it covers the first metal. If a solution-based adhesive layer is applied over everything, dried and cured, and then carefully removed by peeling it away from the substrate, it only removes the second metal from above the first. At the edge of the first metal, the second metal film fractures, and it is found that this creates a gap ~10 nm between the two metals. Before this project, A-Lith was dependent on significant manual handling, requiring painting of a glue and subsequent manual peeling. We identified a critical need for a reliable tool to automate both of these processes which we have designed, built and tested, demonstrating its performance over a 10×10 cm area. A key feature of the new system is the replacement of the wet glue with an adhesive-coated tape which is mounted onto a roller and then fed through to a tape press which controls the pressure of the tape on the surface of a sample. A second roller collects the tape and is attached to a stepper motor which controls the movement of the tape. The stepper motor is automatically controlled and powered through an Arduino. The sample is loaded onto a porous ceramic vacuum plate which holds it in place vertically but allows for lateral movement via the tape moving across the substrate. The tape is then automatically removed from the sample as it passes through the tape press. This is due to the angle of the tape press and resulting tape angle as it moves to the collector roller. The design of the system, which costs under £8,000 to build, has been made available for free download . A second key task has been to broaden the range of metal combinations that can be reliably used to fabricate A-Lith nanogaps. The first and second metals must be strongly adhered to the substrate. The side wall profiles of the first metal after patterning and the second metal after peeling must both be well-defined which is a function of microstructure. The SAM must adhere to the first metal and deposition of the second metal must not damage the SAM. As a result, we now have processes for using Al, Ni, Cr, Cu, Mo and Ti as the first metal and Al, Ni, Cu, Cr and Au as the second metal. One of the most significant features of the A-Lith process with the tape rather than glue is that it allows entirely dry fabrication if used with a shadow masking process for the metals. As an example of this, we have successfully fabricated Schottky diodes using Au and Al metal electrodes and amorphous indium gallium zinc oxide (a-IGZO) semiconductor in the nanogap on isomalt substrates. Isomalt is more commonly associated with fine sugar work on cakes. It is has a rough surface, a very low softening point (just over 100 ºC), and dissolves easily in water, making it one of the most challenging substrates to use, but one which could enable fully ingestible electronics. One of the most attractive features of this work has been the combination of nanomaterials with nanogaps to create nanomaterial-in-nanogap (n-i-n) devices. We have fabricated hBN, WS2 and graphene-based devices. For all devices collaborators have grown 2D materials via a CVD process and then transferred the materials on top of prepatterned nanogap electrodes. The hBN was transferred onto Ni/Au electrodes to see the effect of hBN as a passivating material for Ni electrodes. The WS2 was transferred onto Al/Au nanogap electrodes on glass and graphene was transferred on to Al/Al nanogap electrodes on an Si-SiO2 wafer. The graphene devices indicate a depletion of charges across the graphene when it is placed across the nanogap. This is likely due the effects of band alignment between the Al and graphene across such a small gap and the suspension of the graphene across the gap meaning that there is an absence of an interface between the graphene and the substrate. An effect of device width and suspension can also be seen with larger width devices where the graphene is in contact with the substrate between the electrodes producing significantly more current despite the larger distance between electrodes. |
Exploitation Route | We have made the design of the adhesion lithography tool free to download from the university Repository. In addition, we are developing a number of new research collaborations, including with industry, to encourage the uptake of this technique. |
Sectors | Electronics |
Description | We have published a design for the adhesion lithography tool which is freely available to download from the University's repository at https://doi.org/10.17863/CAM.68204 . We have also followed up with new industry partners on the application of adhesion lithpgraphy in novel electronic device structures. |
First Year Of Impact | 2021 |
Sector | Electronics,Energy |
Impact Types | Economic |
Description | Low Dimensional Electronic Device Fabrication at Low Cost over Large Areas: Follow-on |
Amount | £726,748 (GBP) |
Funding ID | EP/W009757/1 |
Organisation | Engineering and Physical Sciences Research Council (EPSRC) |
Sector | Public |
Country | United Kingdom |
Start | 11/2021 |
End | 10/2024 |
Description | Nanoscale Contacts for Printed Photovoltaics (PV) |
Amount | £19,757 (GBP) |
Organisation | University of Cambridge |
Sector | Academic/University |
Country | United Kingdom |
Start | 09/2022 |
End | 12/2022 |
Title | Design of Adhesion Lithography Tool |
Description | This gives details of how to set up an adhesion lithography patterning tool. |
Type Of Material | Improvements to research infrastructure |
Year Produced | 2021 |
Provided To Others? | Yes |
Impact | New research collaborations with industrial partners. |