Platform: Strained Si / SiGe: Materials, Technology and Design

This Platform Grant will sustain research being carried out at Newcastle University in strained Si/SiGe materials, technology and design. EPSRC, EC and industrial funding has been continuous in this field since 1994, resulting in the publication of more than 50 papers. The world market for semiconductors is counted in $100 Billion's per year and new innovations are now necessary to deliver the raw processing power needed to maintain Moore's Law in the future. Strained Si/SiGe CMOS technology has been pursued to meet this challenge. A thick layer of SiGe deposited on a Si wafer, so that it is relaxed, forms a virtual substrate. A thin layer of Si grown subsequently on the virtual substrate becomes tensile strained, while SiGe epitaxial layers may be either compressive (if the Ge content is above that of the virtual substrate) or tensile (if the Ge content is below that of the virtual substrate). The higher carrier mobility seen in strained Si/SiGe devices can be exploited through higher speed (without re-tooling), larger fan-out or lower power. Our long-term goal is to build an international centre of excellence in the area of synergy between new materials, devices and system design. Specific topics include: material growth, critical thickness, diffusion, defects, device scaling, strain budget design, MOSFET gate stacks, device and process modelling, electrical characterisation, strain characterisation, doping characterisation, robust design and variability in technology-driven design of circuits.