Tunnel epitaxy: building a buffer-less III-V-on-insulator (XOI) platform for on-chip light sources

The past few decades have witnessed an explosive growth in the semiconductor material and device technologies and their profound impact in the shaping of modern society. After experiencing the booming development of personal computer (PC) technology in the 1990s and the upsurge of the Internet in the 2000s, we are embracing a new age of the Internet of Things. As the explosive growth of Internet Protocol (IP) traffic is driving data centres to the so-called "Zettabyte Era", today's electrical interconnects quickly became the bottleneck due to ohmic loss and RC delays of copper wires. Optical interconnects promise to break the bottleneck by enabling data in computers moving both across chips and from chip to chip through photons. Photons are electromagnetic waves with very high frequencies. They can travel at the speed of light and they are super-efficient information carriers. The realisation of optical interconnects requires all optical components from passive to active devices to be integrated on the same silicon-on-insulator platform. Despite great success in developing silicon-based light modulation and detection, the lack of an efficient light emitter due to the indirect bandgap properties of silicon continues to pose a major roadblock. In contrast to silicon, most of III-V compound semiconductors have a direct bandgap with excellent photon absorption and emission efficiency. It is widely perceived that integrating III-V semiconductors, the best available materials for light emitters, on silicon could unpin the transition from electrical to optical interconnects.

Epitaxial growth of III-V materials in the desired areas on silicon offers a scalable, low-cost and high-throughput scheme to bring optical capabilities to silicon integrated circuits. However, there are several fundamental challenges associated with material incompatibility, including a large mismatch in the lattice constants and thermal expansion coefficients, and the growth of polar materials on non-polar substrates. Conventional III-V/Si epitaxy circumvents these challenges through multiple buffer layers on bulk silicon wafers. However, thick buffers limit process throughput and present a big barrier for efficient light coupling to the underlying silicon waveguides.

In this project, an advanced epitaxy process will be developed to enable an III-V on insulator (XOI) structure integrated on silicon wafers. By taking advantage of the crystallographic geography and selective area growth in confined spaces, we aim to achieve dislocation-free micro-sized thin films on insulators without requesting complex buffer designs. Such a buffer-less platform can potentially support intimate integration of III-V compound semiconductors with silicon waveguides and open enormous opportunities in Si photonics. As a proof-of-concept demonstration, micro-disk lasers will be fabricated to validate the optical quality of the III-V structures and highlight its potential for photonics integration.

This project will develop III-V on insulator structures and associated epitaxial growth routes required for photonics manufacturing on silicon. There are enormous economic benefits in growing InP based compound semiconductor materials and devices directly on silicon. Silicon is the workhorse of the microelectronics industry with a multi-hundred-billion-pound market. III-V compounds have established their niches in optoelectronic, high-frequency and high-speed device applications that have a global market around £25Bn. The inherent direct bandgap properties and high electron mobilities in III-V materials enable functionalities that are not easily accessible by the mainstream silicon technology. For a direct comparison of InP and silicon substrates, InP wafers are brittle with a maximum available size up to 150 mm, while the maximum silicon wafer diameter is 300 mm commercially and 450 mm in development with more than 20x reduced substrate cost. Scaling InP based photonics to high-level integration on silicon can greatly expand the capacity of integrated circuits and reduce the size, weight and power dissipation.

This project fits well with the Manufacturing the Future theme of EPSRC's portfolio. Through the development of a novel material synthesis process, we intend to offer a disruptive manufacturing technology that can benefit both the microelectronic and optoelectronic device industry. This will support the UK's capability in information and computing technologies and help build a Productive Nation. As silicon photonics industry is gaining strong momentum over the last decade to enable cutting-edge technologies like on-chip optical interconnects, Datacom, autonomous vehicles and artificial intelligence, this proposal is timely and of significant interest to strengthen UK's leading position in ground-breaking next-generation technologies.

In the context of the Big Data era and emerging 5G technologies, this project forms part of the global efforts towards energy-efficient communication systems for connected nations. As the convergence of voice, video and data networks lead to explosive growth in data traffic, today's data centres are consuming about 3 percent of the global electricity supply and this number is going to be tripled in the next decade. Here we aim to establish a monolithic integration platform to realise a critical component for replacing high dissipation electrical-interconnects with optical interconnects.

At present, the emerging Compound Semiconductor Cluster in South Wales UK holds great promise to shape the region's economic future. This research will add an exciting new dimension to the existing ecosystem and drive new linkages with the wider UK industrial supply chain. We seek to actively engage with industrial and academic partners within the Compound Semiconductor Future Manufacturing Hub network.