Machine Learning Algorithms: From GPU to FPGA to ASIC

The project builds on the successful demonstration (CHEP, Sept 2018) by student, Rinnert and FBK (Marco Christoferetti) that Machine Learning can be used for track reconstruction in particle physics. This was a world first. Here we want the student to demonstrate that AI (mapped onto FPGA then a custom chip) is a potential candidate for (part) solving the problem of the international deficit of computing for HEP. The principle theme of this PhD will be to take a simplified version of this algorithm and deploy it on an FPGA to demonstrate the "wall clock" performance (a key parameter) v CPU.
This hybrid algorithm will be compared against the speed and performance of reinforced learning algorithms which the student will also develop. The development and selection of the mapable algorithm is approximately 6 months of work. The FPGA version and its programming will take a further year. The remaining time will be working with FBK - also a stakeholder in this technology - to produce the ASIC and support boards required to demonstrate that the FPGA model can be transferred to a low cost ASIC. Design and costs of this project will be underwritten by PP. A working solution could be worth up to £100m to the UK community, and has applications outside of fundamental physics. For example, replacing expensive tracking systems with "programmable" register ASICs offers the promise to decrease costs for proton computed tomography systems.
The student will work between PP and latterly FBK . PP has 2 world class FPGA programmers who can participate in this. All cost for this will be borne by PP and we are confident of low risk. PP and FBK will help evaluate the performance of the FPGA model and map this to a design on an ASIC. This is novel and important evolution of the existing CDT programme and our strategic links with FBK to deliver a potentially world beating and innovative results with a world stage at CERN and FNAL to present results.