Online Fault Tolerance Technique for TSV-Based 3-D-IC (2015)

First Author: Zhao Y
Attributed to:  Variation-Aware Test for NanoScale CMOS Integrated Circuits funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tvlsi.2014.2343156

Publication URI: http://dx.doi.org/10.1109/tvlsi.2014.2343156

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Issue: 8