Design of Self-Timed Reconfigurable Controllers for Parallel Synchronization via Wagging (2015)
Attributed to:
Secure Design Flow
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tvlsi.2014.2306176
Publication URI: http://dx.doi.org/10.1109/tvlsi.2014.2306176
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue: 2