Cycle-Accurate Performance Modelling in an Ultra-Fast Just-In-Time Dynamic Binary Translation Instruction Set Simulator (2011)
Attributed to:
Dynamic Adaptation in Heterogeneous Multicore Embedded Processors
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Publication URI: http://groups.inf.ed.ac.uk/pasta/pub_HIPEAC_2011_ISS_CYCLE_BOHM.html
Type: Conference/Paper/Proceeding/Abstract