Performance and Fault Tolerance of Preconditioned Iterative Solvers on Low-Power ARM Architectures

First Author: Aliaga J.

Attributed to: SERT: Scale-free, Energy-aware, Resilient and Transparent Adaptation of CSE Applications to Mega-core Systems funded by EPSRC

Abstract

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Bibliographic Information

Publication URI: http://pure.qub.ac.uk/portal/en/publications/performance-and-fault-tolerance-of-preconditioned-iterative-solvers-on-lowpower-arm-architectures(9a4cfb75-8989-4683-8ecc-46357f9753a3).html

Type: Conference/Paper/Proceeding/Abstract