Design Optimization of Quasi-Active Gate Control for Series-Connected Power Devices (2014)

First Author: Teerakawanich N
Attributed to:  An Innovative Electronics Manufacturing Research Centre funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tpel.2013.2274158

Publication URI: http://dx.doi.org/10.1109/tpel.2013.2274158

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Power Electronics

Issue: 6

ISSN: 0885-8993