A Structured Visual Approach to GALS Modeling and Verification of Communication Circuits (2017)

First Author: Burns F
Attributed to:  Globally Asynchronous Elastic Logic Synthesis (GAELS) funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/TCAD.2016.2611508

Publication URI: http://dx.doi.org/10.1109/TCAD.2016.2611508

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue: 6