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A Globally Arbitrated Memory Tree for Mixed-Time-Criticality Systems (2017)

First Author: Gomony M

Attributed to: Mixed Criticality Embedded Systems on Many-Core Platforms funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tc.2016.2595581

Publication URI: http://ieeexplore.ieee.org/document/7523935/

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Computers

Issue: 2