Reduced-precision Algorithm-based Fault Tolerance for FPGA-implemented Accelerators

First Author: Davis J

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1007/978-3-319-30481-6_31

Publication URI: http://dx.doi.org/10.1007/978-3-319-30481-6_31

Type: Book Chapter

Book Title: Applied Reconfigurable Computing (2016)

Page Reference: 361-368

ISBN: 978-3-319-30480-9

ISSN: 2095-221X