Loop Splitting for Efficient Pipelining in High-Level Synthesis (2016)

First Author: Liu J
Attributed to:  PRiME: Power-efficient, Reliable, Many-core Embedded systems funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/fccm.2016.27

Publication URI: http://dx.doi.org/10.1109/fccm.2016.27

Type: Conference/Paper/Proceeding/Abstract