Optimisation modelling for thermal fatigue reliability of lead-free interconnects in fine-pitch flip-chip packaging (2009)

First Author: Stoyanov S
Attributed to:  Scottish Manufacturing Institute - Renewal, 2008 - 2013 funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1108/09540910910928265

Publication URI: http://dx.doi.org/10.1108/09540910910928265

Type: Journal Article/Review

Parent Publication: Soldering & Surface Mount Technology

Issue: 1