247D9B9F-407B-4DD1-B4A5-E42B8288FCE4VERification-Driven Asynchronous Design (VERDAD)Research GrantEP/G037809/1798CB33D-C79E-4578-83F2-72606407192CEPSRCINCOME_ACTUAL4121435F0D9E4D-2382-4445-94A8-C52FC126C37ASynthesis of Processor Instruction Sets from High-level ISA Specificationsb89ffe33d996c07ced3cb058e6a9cf1aAndrey Mokhov (Author)2012-01-01Technical Reportr_615570107163df031a