High throughput semiconductor QA inspection system

Lead Participant: TERAVIEW LIMITED

Abstract

TeraView has developed a state-of-the-art system (Fig A2) for fault location in semiconductor packages, based on its proprietary terahertz pulse generation and detection technology. This system is used for failure analysis (FA) on semiconductor packages. Pins, balls or pads are selected for probing using a manual micropositioning system. Measurements can typically be made every few minutes, including the time required for ball/pin selection and contacting.
The system works by sending a terahertz pulse into the total package along the interconnects. The magnitude and phase of subsequent reflections reveal the presence and location of open circuits, short circuits and resistive contacts. Customers include Intel and Samsung. This project will develop a prototype test equipment for fast and automated inspection of advanced Integrated Circuit (IC) packages used in mobile computing devices such as smart phones and tablet computing devices. It is estimated that 74% of 2012 semiconductor growth will be in such devices. Device miniaturisation demands much improved resolution in fault detection which current techniques are unable to offer. Further, it requires many silicon dies to be connected together in a package. The lack of reliability of the connections between two dies is an additional failure mechanism, the location of which cannot be easily determined by existing technology. This is a major problem but is one which our technology is uniquely able
to solve.

Lead Participant

Project Cost

Grant Offer

TERAVIEW LIMITED £704,225 £ 250,000
 

Participant

THE TECHNOLOGY STRATEGY BOARD

Publications

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