Codesign: A higher-order approach
Lead Research Organisation:
Imperial College London
Department Name: Electrical and Electronic Engineering
Abstract
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Publications
Batty M
(2016)
Overhauling SC atomics in C11 and OpenCL
Batty M
(2016)
Overhauling SC atomics in C11 and OpenCL
in ACM SIGPLAN Notices
Ramanathan N
(2017)
Hardware Synthesis of Weakly Consistent C Concurrency
Ramanathan N
(2021)
Global Analysis of C Concurrency in High-Level Synthesis
in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Wickerson J
(2015)
Remote-scope promotion: clarified, rectified, and verified
Wickerson J
(2017)
Automatically comparing memory consistency models
Wickerson J
(2017)
Automatically comparing memory consistency models
in ACM SIGPLAN Notices
| Description | That linking / late binding is a feasible approach in codesign, if underpinned by an appropriate type system. |
| Exploitation Route | To improve the synthesis of hardware / software systems |
| Sectors | Digital/Communication/Information Technologies (including Software),Electronics |
| Description | To explore alternative methods of design capture bridging hardware and software. Some of this work was continued by Microsoft Research and is now being investigated in Xilinx Research Labs. |
| Sector | Digital/Communication/Information Technologies (including Software),Electronics |
| Impact Types | Economic |
| Description | Xilinx Inc (Corporate HQ) |
| Organisation | Xilinx Corp |
| Country | United States |
| Sector | Private |
| Start Year | 2005 |