Error-tolerant Stream Processing System Design (ESP-SD)

Lead Research Organisation: University of Edinburgh
Department Name: Sch of Informatics

Abstract

Abstracts are not currently available in GtR for all funded research. This is normally because the abstract was not required at the time of proposal submission, but may be because it included sensitive information such as personal details.
 
Description (1) New non-volatile-memory technologies (such as Intel's new 3D Xpoint memory) which could potentially operate at the speed of DRAM offer the promise of low-overhead durability (persistence). But we discovered that new architectural primitives are needed in order to provide guarantees on what is made durable (otherwise memory can be in erroneous, inconsistent state). We have designed and implemented three new architectural primitives: a persist barrier (which provides ordering) and durable transactions (which provides atomic durability) and hardware support for ACID transactions. The three primitives efficiently stream updates to non-volatile memory in order to guarantee consistency without compromising performance. The three primitives have been published in top-tier international venues in computer architecture: MICRO 2015, HPCA 2017, and the third will appear this year at ISCA 2018.

(2) Processing workloads such as server workloads may involve software having large instruction footprints with deep-layered software stacks that may have an active instruction working set comprising megabytes of instructions. The large instruction footprint and limited available cache capacity can result in a cache problem whereby many cache misses occur during execution, resulting in processing delays due to fetching instructions. Although a number of academic papers have proposed heavy-weight structures for remembering past instruction stream, none of them has been adopted by industry. We developed a lightweight technique to predict future accesses by repurposing the branch predictor for this purpose. We also designed a new branch target buffer (a structure that remembers the branch targets). In combination, these two structures have shown to be very effective in streaming control flow efficiently to a processor. These two works have been published in top-tier venues in computer architecture: HPCA 2017, and ASPLOS 2018. In addition, a patent has been filed. Talks are on with processor manufacturers, including Samsung and Intel, and they have shown interest in implementing these techniques in their processors.
Exploitation Route (1) Non-volatile memory technologies (such as 3DXPoint memory) represent a significant disruption in computer systems: these memories can potentially operate as fast as DRAM, while being non-volatile. Our two proposed architectural primitives provide a low-level programming model and its efficient implementation which can be directly used by processor designers. In fact, this work was done in collaboration with Intel.

(2) A number of processor manufacturers are attempting to solve the frontend bottleneck problem (the inability predict future instruction stream), and our proposed lightweight technique can be used by processor designers to solve this problem.
Sectors Digital/Communication/Information Technologies (including Software),Electronics

 
Description Please see the impact description provided for EP/M00113X/1
Sector Electronics
Impact Types Societal,Economic

 
Description Intel deprecating pcommit
Geographic Reach Multiple continents/international 
Policy Influence Type Influenced training of practitioners or researchers
Impact New memories that are non-volatlile (like disks), yet as fast as volatile memory are on the horizon. In collaboration with Intel, we lead the research on this disruptive new area, on how to integrate these new memories in computing systems. In early 2016, our team with collaborators from Intel made a case for making the memory controllers (the hardware interface to memory) persistent and disclosed this to Intel in April 2016. Intel released a public disclosure in September 2016 stating that Intel's memory controllers will in fact become persistent in future Intel architectures (https://software.intel.com/en-us/blogs/2016/09/12/deprecate- pcommit-instruction).
URL https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction
 
Description ARM Studentship
Amount £63,584 (GBP)
Organisation Arm Limited 
Sector Private
Country United Kingdom
Start 09/2016 
End 08/2020
 
Description AWS Research Grant
Amount $5,250 (USD)
Organisation Amazon.com 
Sector Private
Country United States
Start 06/2015 
 
Description Dijkstra's Pipe: Timing-Secure Processors by Design
Amount £535,238 (GBP)
Funding ID EP/V038699/1 
Organisation Engineering and Physical Sciences Research Council (EPSRC) 
Sector Public
Country United Kingdom
Start 11/2021 
End 11/2024
 
Description Intel University Research Office
Amount $95,000 (USD)
Organisation Intel Corporation 
Department INTEL Research
Sector Private
Country United States
Start 04/2013 
 
Title BRANCH TARGET BUFFER ARRANGEMENT FOR INSTRUCTION PREFETCHING 
Description A branch target buffer, BTB, is provided to store at least one BTB entry corresponding to a respective branch in a control flow in a sequence of machine-readable instructions of a computer program. The BTB has a tag field to compare with a program counter of a fetch address generator and at least one further field to store information characteristic of the branch instruction identified by the corresponding tag field and allowing a conditional branch to be distinguished from an unconditional branch instruction. The BTB has a predetermined storage capacity and is utilized such that unconditional branch instructions are preferentially allocated storage space in the BTB relative to conditional branch instructions. 
IP Reference WO2019162647 
Protection Patent application published
Year Protection Granted 2019
Licensed No
Impact This publication has already been cited by AMD. The associated publication has been cited by Intel among other academic publications.
 
Title BRANCH TARGET BUFFER FOR A DATA PROCESSING APPARATUS 
Description Contemporary server workloads feature massive instruction footprints stemming from deep, layered software stacks. The active instruction working set of the entire stack can easily reach into megabytes, resulting in frequent frontend stalls due to instruction cache misses and pipeline flushes due to branch target buffer (BTB) misses. While a number of techniques have been proposed to address these problems, every one of them requires dedicated metadata structures, translating into significant sto 
IP Reference EP3577553 
Protection Patent granted
Year Protection Granted 2019
Licensed No
Impact This patent has already been cited by ARM, Intel and AMD.
 
Description 2017 ARM Faculty Summit talk 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact ARM, which makes processor chips and IoT products, hosted its annual research conference. The audience included international partners, developers and academics. The talk generated significant interest.
Year(s) Of Engagement Activity 2017
URL https://www.arm.com/company/events/research-summit
 
Description ARM Research Summit (2016) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Industry/Business
Results and Impact Dr. Vijay Nagarajan was an invited speaker at the ARM Research Summit which attracted in excess of 100 delegates. The talk sparked questions and discussions and led to an ARM studentship in a related area.
Year(s) Of Engagement Activity 2016
URL https://developer.arm.com/research/summit/previous-summits/2016
 
Description ARM research summit 2017 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Industry/Business
Results and Impact About 200 people attended the talk I gave at ARM which sparked off discussion. Now collaboration on the topic with ARM through a funded PhD student. The talk was picked by media insideHPC: https://insidehpc.com/2017/10/scaling-arm-architectures/
Year(s) Of Engagement Activity 2017
URL https://insidehpc.com/2017/10/scaling-arm-architectures/
 
Description EPCC Seminar 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach National
Primary Audience Professional Practitioners
Results and Impact Delivered an invited talk at Edinburgh Parallel Computing Centre, which triggered questions and discussions from academics and industrial practitioners.
Year(s) Of Engagement Activity 2015
URL https://www.epcc.ed.ac.uk/
 
Description Guest editor for IEEE Micro 
Form Of Engagement Activity A magazine, newsletter or online publication
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Guested edited the Jan/Feb 2016 issue of IEEE Micro, a bimonthly publication of the IEEE Computer Society, which reaches an international audience of microcomputer and microprocessor designers, system integrators, and users.
Year(s) Of Engagement Activity 2016
URL https://www.computer.org/web/computingnow/micro
 
Description HP visit (Palo Alto) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Industry/Business
Results and Impact About 15 HP Labs employees attended the research talk. The talk lead to the start of a collaboration.
Year(s) Of Engagement Activity 2016
 
Description HPCA 2017(Austin) 
Form Of Engagement Activity Participation in an activity, workshop or similar
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact We presented two papers at HPCA 2017 (co-located with CGO and PPoPP), a top-tier conference in computer architecture attend by around 500 people.
Year(s) Of Engagement Activity 2017
URL https://hpca2017.org/
 
Description Industry visit (ARM) 
Form Of Engagement Activity A formal working group, expert panel or dialogue
Part Of Official Scheme? No
Geographic Reach National
Primary Audience Industry/Business
Results and Impact Visited ARM Research, Cambridge to talk about ARM can benefit from our research and how future collaboration with ARM can be forged.
Year(s) Of Engagement Activity 2015
 
Description Intel research 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Industry/Business
Results and Impact 25 Intel researchers attended the talk, which sparked questions, discussions and possible future collaboration.
Year(s) Of Engagement Activity 2017
 
Description Invited talk at ARM Research Summit 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Presented research outcomes stemming from the ESP-SD project to an audience of around 100 people. The audience consisted of scientists and industry representatives, with both researchers and engineers in the audience. The presentation sparked a lively discussion, and has led to an ongoing collaboration with a division within ARM.
Year(s) Of Engagement Activity 2016
URL https://developer.arm.com/research/summit/previous-summits/2016
 
Description Memory model workshop (Uppsala) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Was invited to deliver a talk in this workshop which was attended by academics and industrial practitioners.
Year(s) Of Engagement Activity 2015
URL http://user.it.uu.se/~mohat117/UpmarcWorkshop/
 
Description Micro 2016 conference (Taiwan) 
Form Of Engagement Activity Participation in an activity, workshop or similar
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Cheng-Chieh Huang presented our paper at this top-tier architecture conference, attended by around 250 delegates. This led to eventually Cheng-Chieh landing a job at Mentor Graphics.
Year(s) Of Engagement Activity 2016
URL https://www.microarch.org/micro49/
 
Description Microarchitecture conference (USA) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact The International Symposium on Microarchitecture is one of the premier conferences in computer architecture. This was an event attended by about 300 academics and industrial practitioners. We presented our paper in this prestigious conference which attracted questions and discussion from the top academic and industrial practitioners.
Year(s) Of Engagement Activity 2015
URL http://www.microarch.org/micro48/
 
Description Organizer of Workshop on Warehouse Scale Memory Systems 
Form Of Engagement Activity Participation in an activity, workshop or similar
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Organized a high-profile workshop co-located with the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). The workshop includes invited keynote and selected talks in areas directly related to the research covered by this grant.
Year(s) Of Engagement Activity 2018
URL http://workshops.inf.ed.ac.uk/wams/
 
Description Organizer of the Workshop on Near-Data Processing (WoNDP) 
Form Of Engagement Activity Participation in an activity, workshop or similar
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Organized the 3rd International Workshop on Near-Data Processing, co-located with the 48th Annual IEEE/ACM International Symposium on Microarchitecture. The workshop drew an international audience of academics, industry professionals and students.
Year(s) Of Engagement Activity 2015
URL http://www.cs.utah.edu/wondp/
 
Description Organizer, 5th Workshop on Architectures and Systems for Big Data (ASBD) 
Form Of Engagement Activity Participation in an activity, workshop or similar
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Organized and chaired the program committee of the 5th Workshop on Architectures and Systems for Big Data (ASBD), held
in conjunction with the 42nd International Symposium on Computer Architecture (ISCA). The workshop was well attended by industry professionals, academics, and students.
Year(s) Of Engagement Activity 2015
URL http://acs.ict.ac.cn/asbd2015/
 
Description Presentation at Samsung (Austin, USA) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Presented key research results of ESP-SD to an audience consisting of Samsung engineers, mid-level managers, and business people. The presentation sparked a long discussion and paved the way to an internship with an interested group at Samsung.
Year(s) Of Engagement Activity 2017
 
Description Safecomp conference (Netherlands) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact We presented our paper at the SAFECOMP conference, which sparked interaction from academics and industry people working in the subject area.
Year(s) Of Engagement Activity 2015
URL http://safecomp2015.tudelft.nl/
 
Description School Visit (Princeton) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Postgraduate students
Results and Impact Dr. Vijay Nagarajan delivered an invited presentation at Princeton university. About 20 academic staff and post-graduate students attended this talk, the talk sparked questions and discussions which lead to the exchange of papers and ideas between the research groups involved.
Year(s) Of Engagement Activity 2016
 
Description School visit (IIT Madras, India) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Postgraduate students
Results and Impact About 40 post-graduate students and academics attended our research talk, which sparked questions and opened future collaboration.
Year(s) Of Engagement Activity 2016
URL http://www.cse.iitm.ac.in/
 
Description School visit (Imperial College London) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach National
Primary Audience Postgraduate students
Results and Impact About 30 people attended our research seminar at Imperial. Out talk sparked questions and discussion.
Year(s) Of Engagement Activity 2014
 
Description School visit (Michigan) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Postgraduate students
Results and Impact 20 post-graduate students and faculty attended for a research visit to University of Michigan which sparked questions and discussion afterwards.
Year(s) Of Engagement Activity 2016
 
Description School visit (Rutgers) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Postgraduate students
Results and Impact 25 students and faculty attended the research visit to University of Rutgers, which sparked questions and discussions afterwards.
Year(s) Of Engagement Activity 2016
 
Description School visit (U Penn) 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Postgraduate students
Results and Impact Dr. Vijay Nagarajan delivered an invited lectuer at U Penn. This talk sparked questions and discussion with academic staff and post-graduate students afterwards.
Year(s) Of Engagement Activity 2016
 
Description Seminar Series at Chinese Academy of Sciences 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Postgraduate students
Results and Impact Taught a series of 4 lectures at the Institute Of Computing Technology, Chinese Academy Of Sciences. The lectures covered research developed as part of this grant.
Year(s) Of Engagement Activity 2017
 
Description Workshop: Numerical Algorithms and Intelligent Software 
Form Of Engagement Activity A talk or presentation
Part Of Official Scheme? No
Geographic Reach International
Primary Audience Professional Practitioners
Results and Impact Gave an invited talk at the Workshop: Numerical Algorithms and Intelligent Software, which sparked questions and discussions from academics and industrial practitioners.
Year(s) Of Engagement Activity 2014
URL http://www.maths.ed.ac.uk/~prichtar/NAIS2014/index.html