Mechanisms and Control of Resistive Switching in Dielectrics
Lead Research Organisation:
Liverpool John Moores University
Department Name: Engineering Tech and Maritime Operations
Abstract
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Publications
Chai Z
(2019)
Dependence of Switching Probability on Operation Conditions in Ge x Se 1-x Ovonic Threshold Switching Selectors
in IEEE Electron Device Letters
Chai Z
(2017)
Probing the Critical Region of Conductive Filament in Nanoscale HfO 2 Resistive-Switching Device by Random Telegraph Signals
in IEEE Transactions on Electron Devices
Chai Z
(2018)
Impact of RTN on Pattern Recognition Accuracy of RRAM-Based Synaptic Neural Network
in IEEE Electron Device Letters
Chai Z
(2019)
RTN in GexSe1-x OTS selector devices
in Microelectronic Engineering
Chai Z
(2018)
The Over-Reset Phenomenon in Ta 2 O 5 RRAM Device Investigated by the RTN-Based Defect Probing Technique
in IEEE Electron Device Letters
Chai Z
(2020)
GeSe-Based Ovonic Threshold Switching Volatile True Random Number Generator
in IEEE Electron Device Letters
Chai Z
(2021)
Cycling Induced Metastable Degradation in GeSe Ovonic Threshold Switching Selector
in IEEE Electron Device Letters
Chai Z
(2020)
Stochastic Computing Based on Volatile GeSe Ovonic Threshold Switching Selectors
in IEEE Electron Device Letters
| Description | RRAMs are strong candidates for new generations memory technology. Filament rupture/restoration induced by movement of defects, e.g. oxygen ions/vacancies (Vo), is considered the switching mechanism in HfO2 RRAM. However, details of filament alteration during switching are still speculative, due to lack of experiment-based probing techniques to directly monitor its spatial and energy profiles and to correlate them with the switching/failure mechanism, impeding its understanding and modeling. In this project, for the first time, an Random-Telegraph -Noise (RTN) -based defect tracking technique (RDT) is developed to monitor the defect movements and the spatial and energy (XT, ET) profile of the critical filament region (CFR). CFR alterations can therefore be directly correlated with switching operations, and new endurance failure mechanism has been revealed. This technique has been taken up by industrial partners at world-leading research centre imec, providing a useful tool for RRAM technology development. For the first time, the following key advances have been achieved in the non-filamentary RRAM cell based on amorphous-Si/TiO2.: i) Switching mechanism by defect profile modulation in a critical interfacial region has been identified from defect locations extracted by RTN; ii) Defect profile in this region plays a critical role in device failure, leading to different Weibull distributions during negative (LRS) and positive (HRS) CVS; iii) Progressive formation of a conductive percolation path during electrical stress is directly observed due to defect generation in addition to pre-existing defect movement; iv) Optimizing the critical interfacial region significantly improves memory window and failure margin. This provides a useful tool for advancing the non-filamentary RRAM technology. v) Switching and relaxation Mechanism in GeSe OTS devices have been investigated with both experimental and theoritical evidence, and its endurance has been improved by more than 5 orders a new program scheme . By utilizing the recently developed defect profiling technique based on random-telegraph-noise (RTN), for the first time, defect profile modulation in TiO2 is correlated with the analog switching, and the gradual growth of a defect-deactivation-region (DDR) near its interface with a-Si causes the LRS endurance instability, while treset/tset ratio is found critical for the HRS instability. Under this guidance, a stable x10 window for 1M cycles is restored through combining optimizations of device structure and set/reset conditions, paving the way for a-VMCO's practical applications. |
| Exploitation Route | This techniques have been taken up by industrial partners including Intel, Samsung, and Micron at world-leading research centre imec, providing a useful tool for RRAM technology development. A paper has been presented at the flagship conference VLSI Technology Symposium 2016, IEDM 2016, VLSI 2019, IEDM 2019, respectively. A number of papers have been published in leading journals. |
| Sectors | Digital/Communication/Information Technologies (including Software),Electronics,Manufacturing, including Industrial Biotechology |
| URL | https://www.ljmu.ac.uk/about-us/staff-profiles/faculty-of-engineering-and-technology/department-of-electronics-and-electrical-engineering/wei-zhang |
| Description | Resistive-switching devices are based on materials in which the resistance can be varied and memorized by controlling the flow of electric charge in thin dielectric layers. These devices will lead to a range of disruptive inventions and the technology is expected to become one of the major driving forces to overcome the scaling limits at the end of roadmap, supporting the ICT industry for the next 20 years, which has opened multiple revolutionary frontiers for ICT industry. The non-volatile resistive-switching devices and OTS selector devices have high speed (ns), high density (4F2), long retention (10 years), high endurance and 3D integration, therefore will not only drastically enhance the performance of non-volatile memories, but will also revolutionize computer architecture. Its simple structure, low cost and 3D compatibility with back-end of line processing warranty its system-on-chip application which can be embedded within the CPU. It also has a high potential to replace DRAM, Flash memory and HDD all together for its fast speed (DRAM), non-volatile memory (Flash) and high capacity (HDD), as referred to the "Storage Class Memory (SCM)". This offers a host of new opportunities to system designers, opening up the possibilities for ultra-fast operation with truly persistent data, providing a significant increase in information throughput beyond the traditional benefits of scaling. It can also provide nano-sized, programmable multi-level variable resistance for a number of analogue applications including neuromorphic computing system in which its nonlinear dynamics can be used as synapses/neurons, a breakthrough for artificial intelligence computing. Its disruptive impacts on ICT industry are widely predicted. The outcomes of this projects have been used at imec and by its core industrial partners including Intel, Samsung, Micron, etc. to develop the next generation of RRAM technology. |
| First Year Of Impact | 2014 |
| Sector | Digital/Communication/Information Technologies (including Software),Electronics,Manufacturing, including Industrial Biotechology |
| Impact Types | Economic |
| Title | RTN-based defect tracking technique (RDT) in RRAM devices |
| Description | For the first time, an RTN-based defect tracking technique (RDT) is developed to monitor the defect movements and the spatial and energy (XT, ET) profile of the critical filament region (CFR). CFR alterations can be directly correlated with switching operations, and new endurance failure mechanism has been revealed. |
| Type Of Material | Technology assay or reagent |
| Year Produced | 2016 |
| Provided To Others? | Yes |
| Impact | The technique and methodology has been taken up by industrial partners at the IMEC memory device consortium. |
| Description | IMEC memory consortium, Belgium |
| Organisation | Interuniversity Micro-Electronics Centre |
| Country | Belgium |
| Sector | Academic/University |
| PI Contribution | A LJMU PhD student have been trained at IMEC for 3 months each year and/or participated in the weekly meeting with IMEC. His progress have been closely monitored. This provides a direct channel for collaboration between the present project team and IMEC consortium. |
| Collaborator Contribution | IMEC Industrial Affiliation Program is a world-leading consortium including virtually all of the top semiconductor manufacturers among its core technology partners (eg Intel, Samsung, Micron Technology, Hynix, STMicroelectronics, NXP Semiconductors, and Toshiba, etc.) as well as most of the major capital equipment developers and manufacturers. Partners delegate senior industrial researchers to IMEC to carry out joint research using best in-class equipment within IMEC's 300mm clean room infrastructure to solve the most important issues commonly faced by the industry. The collaborative agreement officially signed by LJMU and IMEC takes the advantage of this program, which allows us to work closely with these partners throughout the project. This provides a unique and most effective path to disseminate the research results directly to the major industrial companies, and ensures the project to work at the front line of research and development of resistive switching devices. For example, 1) The project will be steered by researchers from the industrial consortium at IMEC to ensure its industrial relevance; 2) The 300k Euro worth of samples provided by IMEC are manufactured to the highest standard according to industrial partners' requirements in order to investigate issues of major concerns; 3) A LJMU PhD student will be trained at IMEC for 6 months each year and participate in the weekly meeting at IMEC. His progress will be closely monitored. This will provide a direct channel for collaboration between the present project team and IMEC consortium; 4) The IP-irrelevant results can be disseminated directly to the core industrial partners through these meetings and feedbacks are received directly from the partners. In these meetings the potential applications of new theory and characterisation techniques are discussed and taken up by partners. 5) Senior managerial and technical members of partners participate the review week held twice every year at IMEC, during which the latest development will be presented and disseminated to the senior level, and will have direct impact on the research and development decision making. Four of the world top five semiconductor manufacturers, Intel (1st), Samsung (2nd), Micron (4th) and Hynix (5th), are members of the IMEC consortium and are working together on the resistive switching device programme. The fact that IMEC is willing to provide a wide range of support and become the project partner and Micron and Samsung are willing to endorse the project and become the members of the steering panel demonstrate the importance of the issues addressed in this project to the global industry, and their recognition of the project team's ability to make major breakthrough. On this basis, it is clear that the project will have an international reach and will strengthen the link between UK and world leading companies. The results will provide important support to the modelling, manufacturing, quality assessment, and reliability sections of the industry, and provide the possibility to greatly enhance its technological and scientific impact. A new collaboration agreement between LJMU and IMEC is being signed till 2025. |
| Impact | A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2019 and IEEE VLSI Technology Symposium 2019, and the technique has been taken up by industrial partners at imec. Two research visits to imec has been carried out by LJMU researchers in 2019. A number of online project meeting have been held in 2020. Regular meetings have been held in 2021-2022, and a joint paper has been submitted to IEEE VLSI Technology Symposium 2022. |
| Start Year | 2018 |
| Description | UK Dielectric Consortium |
| Organisation | Interuniversity Micro-Electronics Centre |
| Country | Belgium |
| Sector | Academic/University |
| PI Contribution | The team at LJMU has focused in the past 20 years and in five EPSRC grants on developing new techniques for characterising defects in dielectric stacks, including HfO2 and Al2O3. A number of new techniques have been developed, such as the fast single pulse, multiple-pulse, on-the-fly techniques, etc. Systematic investigation has been carried out and new technique has been developed for the resistive-switching RRAM devices. A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2016 and 2019 and IEEE VLSI Technology Symposium 2016 and 2019, and the technique has been taken up by industrial partners at imec. |
| Collaborator Contribution | The partners have complementary strengths on the modelling, synthesis and characterisation of dielectric thin film: University of Cambridge on theory and simulation of defects in oxides and variability; UoL on ALD film deposition and device fabrication. A combination of modelling and simulation has been used at UoC to identify combinations of materials and the influence of their defect structures on key resistive switching parameters. These have been characterised using a range of physic-chemical-electrical analytical methods to correlate their microstructures with the modelling data and the electrical performance of resistive switching devices at UoL. IMEC has provided state-of-the-art RRAM devices to LJMU, and new techniques has been developed at LJMU, which has been taken up by industrial partner at IMEC, including Intel, Samsung and Micron. |
| Impact | A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2016 and 2019 and IEEE VLSI Technology Symposium 2016 and 2019, and the technique has been taken up by industrial partners at imec. Two posters and two presentations have been delivered at the IMEC technology review week to the industrial partners. |
| Start Year | 2015 |
| Description | UK Dielectric Consortium |
| Organisation | University of Cambridge |
| Country | United Kingdom |
| Sector | Academic/University |
| PI Contribution | The team at LJMU has focused in the past 20 years and in five EPSRC grants on developing new techniques for characterising defects in dielectric stacks, including HfO2 and Al2O3. A number of new techniques have been developed, such as the fast single pulse, multiple-pulse, on-the-fly techniques, etc. Systematic investigation has been carried out and new technique has been developed for the resistive-switching RRAM devices. A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2016 and 2019 and IEEE VLSI Technology Symposium 2016 and 2019, and the technique has been taken up by industrial partners at imec. |
| Collaborator Contribution | The partners have complementary strengths on the modelling, synthesis and characterisation of dielectric thin film: University of Cambridge on theory and simulation of defects in oxides and variability; UoL on ALD film deposition and device fabrication. A combination of modelling and simulation has been used at UoC to identify combinations of materials and the influence of their defect structures on key resistive switching parameters. These have been characterised using a range of physic-chemical-electrical analytical methods to correlate their microstructures with the modelling data and the electrical performance of resistive switching devices at UoL. IMEC has provided state-of-the-art RRAM devices to LJMU, and new techniques has been developed at LJMU, which has been taken up by industrial partner at IMEC, including Intel, Samsung and Micron. |
| Impact | A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2016 and 2019 and IEEE VLSI Technology Symposium 2016 and 2019, and the technique has been taken up by industrial partners at imec. Two posters and two presentations have been delivered at the IMEC technology review week to the industrial partners. |
| Start Year | 2015 |
| Description | UK Dielectric Consortium |
| Organisation | University of Liverpool |
| Country | United Kingdom |
| Sector | Academic/University |
| PI Contribution | The team at LJMU has focused in the past 20 years and in five EPSRC grants on developing new techniques for characterising defects in dielectric stacks, including HfO2 and Al2O3. A number of new techniques have been developed, such as the fast single pulse, multiple-pulse, on-the-fly techniques, etc. Systematic investigation has been carried out and new technique has been developed for the resistive-switching RRAM devices. A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2016 and 2019 and IEEE VLSI Technology Symposium 2016 and 2019, and the technique has been taken up by industrial partners at imec. |
| Collaborator Contribution | The partners have complementary strengths on the modelling, synthesis and characterisation of dielectric thin film: University of Cambridge on theory and simulation of defects in oxides and variability; UoL on ALD film deposition and device fabrication. A combination of modelling and simulation has been used at UoC to identify combinations of materials and the influence of their defect structures on key resistive switching parameters. These have been characterised using a range of physic-chemical-electrical analytical methods to correlate their microstructures with the modelling data and the electrical performance of resistive switching devices at UoL. IMEC has provided state-of-the-art RRAM devices to LJMU, and new techniques has been developed at LJMU, which has been taken up by industrial partner at IMEC, including Intel, Samsung and Micron. |
| Impact | A number of papers have been published in the flagship journal IEEE Transactions on Electron Devices and conferences IEEE Electron Device Meeting 2016 and 2019 and IEEE VLSI Technology Symposium 2016 and 2019, and the technique has been taken up by industrial partners at imec. Two posters and two presentations have been delivered at the IMEC technology review week to the industrial partners. |
| Start Year | 2015 |
| Description | Invited talk |
| Form Of Engagement Activity | A talk or presentation |
| Part Of Official Scheme? | No |
| Geographic Reach | International |
| Primary Audience | Industry/Business |
| Results and Impact | Invited talk at an international conference |
| Year(s) Of Engagement Activity | 2019 |
| URL | https://www.lboro.ac.uk/media/wwwlboroacuk/external/content/schoolsanddepartments/physics/documents/... |
| Description | Workshop |
| Form Of Engagement Activity | A talk or presentation |
| Part Of Official Scheme? | No |
| Geographic Reach | International |
| Primary Audience | Industry/Business |
| Results and Impact | A invited talk at Stanford University during the "Stanford-imec RRAM Workshop", which has over 100 audience including the top scientists around world in this field from universities and industry. |
| Year(s) Of Engagement Activity | 2016 |
| URL | https://nmtri.stanford.edu/RRAM2016 |
| Description | Workshop |
| Form Of Engagement Activity | A talk or presentation |
| Part Of Official Scheme? | No |
| Geographic Reach | International |
| Primary Audience | Professional Practitioners |
| Results and Impact | Invited talk at the Annual Workshop 2019 of 111 Project Base of Wide Band-gap Semiconductor & Micro-nano Electronics at Xidian University from July 15 to 17 2019. 100 postgraduate students attended and had active discussions. |
| Year(s) Of Engagement Activity | 2019 |