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Photonic integration using Laser interference structured substrates

Lead Research Organisation: University of Sheffield
Department Name: Electronic and Electrical Engineering

Abstract

The integration of diverse semiconductor materials on a single substrate is highly desirable for future electronic and photonic devices. In particular, the integration of III-V semiconductors on silicon, the industry substrate of choice, would leverage the benefits of existing electronic device concepts based on the low-cost, large wafer size and the excellent manufacturability of silicon with III-V materials offering superior electronic and photonic performance However materials integration has remained a challenge over many years due to dissimilarities in the crystal size and other properties which need to be accommodated at the interface of these materials without propagating into the III-V layer.

To address this issue, we propose a radical method to monolithically integrate III-V materials onto silicon substrates using an innovative silicon substrate nanostructuring process based on direct laser interference. The approach transforms the planar silicon surface into a highly structured array which can accommodate the differences between crystal size and type. This novel approach has potential to leverage the benefits of the monolithic integration of III-V devices on a Si-based platform, which is an essential requirement for next-generation photonic integrated circuits, III-V CMOS, and quantum devices. The project is high risk-high reward, based on incidental observations from a previous project. Some proof of principle exists, but the overall approach is yet to be fully explored. If successful, this could finally solve the problem of highly mismatched epitaxy and have transformational impact on industry, opening the prospect of integration of a wide range of alternative materials on the substrate of industry choice.

The proposal seeks to develop this approach to produce high quality III-V buffer layers onto silicon. On to these III-V layers we will grow, fabricate, and test photonic devices such as laser and solar cells. The demonstration of laser operation is a critical device demonstration for off-chip optical interconnects to CMOS enabling faster connection between individual processors and overcoming a major bottleneck which will limit next-generation computing performance. The multijunction solar cell combines absorbing junctions of silicon and at least two III-V junctions. Semiconductor multijunction cells offer the highest quantum efficiency of all photovoltaics, with potential to go further and exceed 50%. However, the current technology approach means that these cells are far too expensive for consumer use. We believe we have the potential to provide a lower cost approach through our in-situ produced structured substrates, which if successful could revolutionise solar energy generation.
 
Title Supplementary material 
Description Supplementary material for Photonic Crystal Enhanced Light Emitting Diodes Fabricated by Single Pulse Laser Interference Lithography 
Type Of Art Image 
Year Produced 2024 
Impact Used as a figure in various publicity 
URL https://aip.figshare.com/articles/figure/Supplementary_material/26963410
 
Description Surface structured substrates or epitaxial layers have been developed for a number of applcitions, including light emitting diodes, solar cells and strain releif substrates. Previopus work has been expanded to include silicon, and GaN.
Exploitation Route Developing high effiicieny semiconductor devices
Sectors Aerospace

Defence and Marine

Digital/Communication/Information Technologies (including Software)

Electronics

 
Description Research Collaboration with Aegiq 
Organisation AegiQ
Country United Kingdom 
Sector Private 
PI Contribution Collaborative development of materials for single photon sources
Collaborator Contribution Access to specialist facilities and know-how
Impact Developing quantum dot sources for new single photon source product
Start Year 2022
 
Description Research Collaboration with CEIT 
Organisation IK4-Cidetec
Country Spain 
Sector Private 
PI Contribution Joint research in the improvement of interference patterning techniques
Collaborator Contribution Transfer of advice and know-how. Exchange of samples and data
Impact Joint publications
Start Year 2022
 
Description Research Collaboration with the Paul Drude Institute, Berlin 
Organisation Paul Drude Institute for Solid State Electronics
Country Germany 
Sector Academic/University 
PI Contribution Studies of the patterning of metallic films
Collaborator Contribution Supply of materials and technical dicussions
Impact Ongoing studies
Start Year 2023
 
Description Research collaboration SUDA 
Organisation Soochow University
Country Taiwan, Province of China 
Sector Academic/University 
PI Contribution Technical advice. Developing joint publications
Collaborator Contribution Access to research data. Technical advice.
Impact Working on joint publications based on SUDA prior work, which has strong similarities to our project
Start Year 2022