R&D in preparation for an upgrade of CMS for the Super-LHC

Lead Research Organisation: Imperial College London
Department Name: Physics

Abstract

The LHC machine will be upgraded to increase the luminosity by an order of magnitude to 10^35 cm-2.s-1. The date for the upgrade is not yet defined but is expected to be about 10 years after LHC starts operating. The machine parameters are not yet frozen but the clock speed is expected to be 20MHz instead of the current 40MHz. The motivation is to extend the physics reach of the LHC and to study with greater precision the discoveries expected to be made at LHC since, after several years at maximum luminosity, the statistical gains gradually decline with time, or integrated luminosity. The major part of the CMS upgrade will be to construct a new tracking detector to operate with similar performance in conditions of greatly increased secondary particle fluences, by a factor of about 20 in each bunch crossing. There are major technical challenges to copy with increased radiation damage and deliver power to the detector. If the overall performance of the present tracker is to be equalled or exceeded, lower power operation and a reduced material budget are important objectives to achieve. There is an additional new challenge to maintain the first level trigger rate at below 100kHz. The main innovation to make this possible will be to include data from the tracker in the first level hardware trigger decision, which is very novel and extremely challenging. Simulation studies form an important element of designing a new tracker and achieving the triggering objective. UK CMS plans to build on its existing expertise to contribute to the simulations, readout and triggering activities. It expects to maintain a prominent position in a future CMS where we hold well established important scientific management roles, in detector construction, computing, and physics analysis.

Publications

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Uchida K (2023) Studies of the CBC3.1 readout ASIC for CMS 2S-modules in Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment

 
Description Further progress with the CBC ASIC development for the upgrade of the CMS tracker. The CBC3.1 version is now final and has been subject to a wide range of tests, including ionising radiation tolerance and single event upset studies. Prototyping of modules using it is also well advanced.

For the data acquisition and trigger activities, the Serenity FPGA processing board is very advanced. A number are in use for different applications in the CMS collaboration, where prototyping for the CMS Phase II upgrade is under way. Algorithm and firmware development has been proceeding steadily for track finding and Level-1 triggering of CMS in the future.
Exploitation Route The CMS 2S-modules based on the CBC3.1 ASIC are already being proposed for use in other experiments, and the Serenity board is also proposed for their readout and data processing. Serenity is proposed for other applications as well, providing flexible and very powerful data processing, and demonstrators for several other projects have been proposed. At present, the main limitation for such applications is available resources, but a flexible demonstrator is under development to aid such activities.
Sectors Digital/Communication/Information Technologies (including Software),Education

URL http://www.imperial.ac.uk/high-energy-physics/research/detector-development/
 
Description Demonstrators of the FPGA-baed processors will have applications in several other areas, and much of the progress made during this award is already having an impact on other projects. For example, in the CMS experiment several sub-detectors which were not originally the subject of this R&D propose to make use of the Serenity board. In addition, other particle physics experiments outside CMS propose to use the CBC ASIC and the Serenity. There are applications in discussion for non-high energy physics projects as well.
First Year Of Impact 2017
Sector Digital/Communication/Information Technologies (including Software),Education
 
Title CBC design 
Description CBC ASIC design is not publicly accessible so IPR is inherently held by the designers, based at Imperial College and Rutherford Appleton Laboratory. 
IP Reference  
Protection Protection not required
Year Protection Granted
Licensed No
Impact Important implications for low-noise circuits in particle physics applications but it is too early to describe further impact.
 
Title CBC2 ASIC design 
Description Development of an ASIC capable of producing trigger primitives from track hits in silicon sensors in the CMS experiment 
IP Reference  
Protection Protection not required
Year Protection Granted 2013
Licensed No
Impact Further development of modules allowing track-trigger primitives to be produced and demonstration in a test beam
 
Title FC7 processing board 
Description State of the art uTCA data acquisition processing board, with FMC carriers to permit flexible use 
IP Reference  
Protection Protection not required
Year Protection Granted 2013
Licensed No
Impact Application in the CMS experiment in the pixel system, TCDS system and future tracker upgrade DAQ
 
Title MP7 hardware, firmware and software 
Description Development of a state of the art FPGA-based processing board for triggering and other DAQ applications in the CMS experiment 
IP Reference  
Protection Protection not required
Year Protection Granted 2013
Licensed No
Impact Demonstration of a new type of trigger- the Time Multiplexed Trigger
 
Title mini-T5 board firmware and software 
Description The development of the firmware and software makes the mini-T5 board a usable device. However, the firmware and software are not widely distributed and thus subject to internal protection, in case other applications might arise. 
IP Reference  
Protection Protection not required
Year Protection Granted
Licensed No
Impact None at present