System-on-Chip Overlay Methodologies for Software Defined Radio

Lead Research Organisation: University of Strathclyde
Department Name: Electronic and Electrical Engineering

Abstract

In the last five years, programmable System on Chip (SoC) technology based on Field Programmable Gate Arrays (FPGAs) has gained considerable momentum. These SoCs combine the highly parallel, deterministic computation of an FPGA, with one or more traditional processing cores, capable of running Operating Systems (OSs) and software-based processing.
As these devices have developed, they have gained in complexity, with a number of different types of processing elements now combined into a single chip (FPGA resources, applications processors, real-time processors, graphics processors, video encoders, and so on), hence the name Multi-Processor SoC (MPSoC) adopted by vendor Xilinx, and more recently still, their specialist radio version, the Radio Frequency SoC (RFSoC), which was released in 2017. While having access to all of these optimised resources is welcome, it does present a challenge in terms of development time, effort, and the combination of skills required to complete a full system design.
An emerging solution to this design challenge is the 'overlay' paradigm, best captured and supported by Xilinx in the form of their Python Productivity for Zynq ('Pynq') methodology. Pynq seeks to accelerate the realisation of a system by providing: (i) a set of open-source tools; (ii) a framework for developing software in the productivity language, Python; and (iii) the introduction of a hardware 'overlay' philosophy, where hardware systems are designed with themed but relatively flexible functionality, intended for reuse and sharing. The Pynq approach, and others like it, are expected to grow in significance as pressures on system complexity and time-to-market inevitably grow.
The overlay / Pynq approach is highly suited to Software Defined Radio (SDR) technology, wherein the functionality of one or more aspects of a radio is controlled via software. The new RFSoC provides a breakthrough SDR capabilities, due to the sampling rates and system integration that it offers. The application of Pynq to SDR, specifically via the RFSoC platform, therefore provides a highly exciting research opportunity which has barely been explored. The development of SDR systems based on Pynq overlays would enable highly flexible and rapidly developed radio applications for next generation systems, including accelerating the evaluation of candidate technologies for 5G, and the realisation of Dynamic Spectrum Access (DSA) radio schemes (wherein use of the radio spectrum is achieved opportunistically, rather than via the traditional fixed spectrum allocation approach).
The proposed research project will consider the following aspects of overlay methodologies for SDR:
1. Use of the RFSoC, including an assessment of capabilities, limitations, and best use of its resources for developing radio transmitter and receiver architectures.
2. The development of hardware overlay systems for SDR applications, focussing on existing and emerging standards for wireless data networks.
3. Research into the trade-off between fully optimised SDR hardware, and aspects of generic functionality / flexibility.
4. Development of a Pynq SDR framework employing multiple overlays to achieve full flexibility of radio functionality. Assessment and characterisation of these systems, consideration of how to deploy them in a network scenario, and evaluation of their performance.
5. Consideration of possible business / community reuse models.

Publications

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Studentship Projects

Project Reference Relationship Related To Start End Student Name
EP/R513349/1 01/10/2018 30/09/2023
2110783 Studentship EP/R513349/1 01/10/2018 31/01/2023 Lewis McLaughlin