A pixel-parallel cellular processor array in a stacked three-layer 3D silicon-on-insulator technology (2009)
Attributed to:
Fine-Grain Parallel Cellular Processor Arrays in 3D Silicon Technologies
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/ecctd.2009.5274946
Publication URI: http://dx.doi.org/10.1109/ecctd.2009.5274946
Type: Conference/Paper/Proceeding/Abstract