An EELS sub-nanometer investigation of the dielectric gate stack for the realization of InGaAs based MOSFET devices (2010)
Attributed to:
III-V MOSFETs for Ultimate CMOS
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1088/1742-6596/241/1/012034
Publication URI: http://dx.doi.org/10.1088/1742-6596/241/1/012034
Type: Journal Article/Review
Parent Publication: Journal of Physics: Conference Series