Mitigation of process variation effect in FPGAs with partial rerouting method (2014)
Attributed to:
Real-time Numerical Optimization in Reconfigurable Hardware with Application to Model-Predictive Control
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1587/elex.11.20140011
Publication URI: http://dx.doi.org/10.1587/elex.11.20140011
Type: Journal Article/Review
Parent Publication: IEICE Electronics Express
Issue: 3