Network-Level FPGA Acceleration of Low Latency Market Data Feed Arbitration (2015)
Attributed to:
Custom Computing for Advanced Digital Systems
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1587/transinf.2014rcp0011
Publication URI: http://dx.doi.org/10.1587/transinf.2014rcp0011
Type: Journal Article/Review
Parent Publication: IEICE Transactions on Information and Systems
Issue: 2