Comparative performance evaluation of latency and link dynamic power consumption modelling algorithms in wormhole switching networks on chip (2016)

First Author: Harbin J
Attributed to:  Mixed Criticality Embedded Systems on Many-Core Platforms funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1016/j.sysarc.2016.01.002

Publication URI: http://dx.doi.org/10.1016/j.sysarc.2016.01.002

Type: Journal Article/Review

Parent Publication: Journal of Systems Architecture