An Investigation on Border Traps in III-V MOSFETs With an In 0.53 Ga 0.47 As Channel (2015)
Attributed to:
Time-Dependent Variability: A test-proven modelling approach for systems verification and power consumption minimization
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/ted.2015.2475604
Publication URI: http://dx.doi.org/10.1109/ted.2015.2475604
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Electron Devices
Issue: 11