Optimization of inter-gate-dielectrics in hybrid float gate devices to reduce window instability during memory operations (2014)

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1016/j.microrel.2014.07.087

Publication URI: http://dx.doi.org/10.1016/j.microrel.2014.07.087

Type: Journal Article/Review

Parent Publication: Microelectronics Reliability

Issue: 9-10