Architectural Synthesis of Multi-SIMD Dataflow Accelerators for FPGA (2018)
Attributed to:
Softcore Streaming Processors for FPGA
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tpds.2017.2746081
Publication URI: http://dx.doi.org/10.1109/tpds.2017.2746081
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Parallel and Distributed Systems
Issue: 1