Response-time analysis for fixed-priority systems with a write-back cache (2018)

First Author: Davis R
Attributed to:  Mixed Criticality Embedded Systems on Many-Core Platforms funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1007/s11241-018-9305-z

Publication URI: http://dx.doi.org/10.1007/s11241-018-9305-z

Type: Journal Article/Review

Parent Publication: Real-Time Systems

Issue: 4