Binary Reachability of Timed-register Pushdown Automata and Branching Vector Addition Systems (2019)

First Author: Clemente L

Attributed to: Counter Automata: Verification and Synthesis funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1145/3326161

Publication URI: http://dx.doi.org/10.1145/3326161

Type: Journal Article/Review

Parent Publication: ACM Transactions on Computational Logic

Issue: 3