Charge-trapping memory based on tri-layer alumina gate stack and InGaZnO channel (2020)

First Author: Ma P

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1088/1361-6641/ab7c7a

Publication URI: http://dx.doi.org/10.1088/1361-6641/ab7c7a

Type: Journal Article/Review

Parent Publication: Semiconductor Science and Technology

Issue: 5