Simulation Study of Overlap Capacitance in Source-Gated Transistors for Current-Mode Pixel Drivers (2019)
Attributed to:
Nanoelectronic circuits and devices
funded by
NERC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/led.2019.2926351
Publication URI: http://dx.doi.org/10.1109/led.2019.2926351
Type: Journal Article/Review
Parent Publication: IEEE Electron Device Letters
Issue: 9