FPGA-Based Acceleration for Bayesian Convolutional Neural Networks (2022)
Attributed to:
Application Customisation: Enhancing Design Quality and Developer Productivity
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.1109/tcad.2022.3160948
Publication URI: http://dx.doi.org/10.1109/tcad.2022.3160948
Type: Journal Article/Review
Parent Publication: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue: 12