Reconfigurable 2, 3 and 5-point DFT processing element for SDF FFT architecture using fast cyclic convolution algorithm (2020)

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1049/el.2019.4262

Publication URI: https://api.elsevier.com/content/abstract/scopus_id/85087095115

Type: Journal Article/Review

Parent Publication: Electronics Letters

Issue: 12