Fast-Processing Capacitor Voltage Balancing Algorithm for Single-End Five-Level NPC Converters Based on Redundant Level Modulation (2024)

First Author: Wang J

Attributed to: Converter Architectures funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1109/tpel.2023.3328980

Publication URI: http://dx.doi.org/10.1109/tpel.2023.3328980

Type: Journal Article/Review

Parent Publication: IEEE Transactions on Power Electronics

Issue: 1