Design Time Methodology for the Formal Modeling and Verification of Smart Environments (2014)
Attributed to:
UbiVal: Fundamental Approaches to Validation of Ubiquitous Computing Applications and Infrastructures
funded by
EPSRC
Abstract
No abstract provided
Bibliographic Information
Digital Object Identifier: http://dx.doi.org/10.6092/polito/porto/2536725
Publication URI: http://porto.polito.it/id/eprint/2536725
Type: Other