Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box (2008)

First Author: Tillich S
Attributed to:  Reassessing Processor Design Assumptions in Cryptography funded by EPSRC

Abstract

No abstract provided

Bibliographic Information

Digital Object Identifier: http://dx.doi.org/10.1007/s11265-007-0158-2

Publication URI: http://dx.doi.org/10.1007/s11265-007-0158-2

Type: Journal Article/Review

Parent Publication: Journal of Signal Processing Systems

Issue: 2